Architectures and Simulations
for Nanoprocessor Systems Integrated on the Molecular Scale
June 2005
Shamik Das, The MITRE Corporation
Garrett S. Rose, The MITRE Corporation
Matthew M. Ziegler, IBM
Carl A. Picconatto, The MITRE Corporation
James C. Ellenbogen, The MITRE Corporation
ABSTRACT
This chapter concerns the design, development, and simulation of
nanoprocessor systems integrated on the molecular scale. It surveys ongoing research
and development on nanoprocessor architectures and discusses challenges in
the implementation of such systems. System simulation is used to identify some
advantages, issues, and trade-offs in potential implementations. Previously, the authors
and their collaborators considered in detail the requirements and likely performance
of nanomemory systems. This chapter recapitulates the essential aspects
of that earlier work and builds upon those efforts to examine the likely architectures
and requirements of nanoprocessors. For nanoprocessor systems, simulation, as well
as design and fabrication, embodies unique problems beyond those introduced by
the large number of densely-packed, novel nanodevices. For example, unlike the
largely homogeneous structure of circuitry in nanomemory arrays, a high degree
of variety and inhomogeneity must be present in nanoprocessors. Also, issues of
clocking, signal restoration, and power become much more significant. Thus, building
and operating nanoprocessor systems will present significant new challenges
and require additional innovations in the application of molecular-scale devices and
circuits, beyond those already achieved for nanomemories. New nanoelectronic devices,
circuits, and architectures will be necessary to perform the more complex
and specialized functions inherent in processing systems at the nanometer scale.
This chapter highlights the fundamental design requirements of such nanoprocessor
systems, presents various device and design options, and discusses their potential
implications for system performance.

Publication
Introducing Molecular Electronics, Springer-Verlag, Heidelberg (2005).
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