System-Level Design and Simulation of Nanomemories and Nanoprocessors
October 2006
Shamik Das, The MITRE Corporation
Carl A. Picconatto, The MITRE Corporation
Garrett S. Rose, The MITRE Corporation
Matthew M. Ziegler, IBM T. J. Watson Research Center
James C. Ellenbogen, The MITRE Corporation
ABSTRACT
This paper describes in detail system designs and system simulations for electronic nanocomputers that
are integrated on the molecular scale. These systems are considered here as consisting primarily of the
combination of two component subsystems, nanomemories and nanoprocessors. Challenges are enumerated
for the design and development of both of these ultra-densely integrated components. Various system-level
designs or architectures are presented that have been proposed to meet these challenges. Detailed
consideration is given for both nanomemories and nanoprocessors to system designs that are based upon
arrays of crossed nanowires. In each case, a system simulation is performed to assess and to help optimize the
prospective performance of the system component in advance of its fabrication. In the ongoing development
of crossbar nanocomputer systems, these simulations have been integral to the refinement of designs because
they assist in reducing the time and cost of such development.
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Publication
This chapter appears in the CRC Nano and Molecular Electronics Handbook, May 2007.
Copyright © 2007 by Taylor & Francis Group, LLC, except where otherwise indicated.
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