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Clocking Nanocircuits for Nanocomputers and Other Nanoelectronic Systems
January 2008
Shamik Das, The MITRE Corporation
Matthew F. Bauwens, The MITRE Corporation
ABSTRACT
Prospective performance bounds are determined by
simulation for a class of all-nanoelectronic clocking circuits.
Such nanocircuits could be utilized as on-chip master clocks for
stand-alone nanosystems, as local clocks within nanoelectronic
computers, or as local oscillators in mixed-signal nanoelectronic
applications. Designs and simulation results are presented for
these nanocircuits, which are intended to be manufacturable
using presently available nanodevices and nanofabrication techniques.
The results presented here indicate that such clocking
nanocircuits, if built using presently available devices, could
achieve operating frequencies up to approximately 1 GHz for
analog applications and 150 MHz for digital nanoelectronic
systems.
Publication
Copyright © 2007 IEEE. Reprinted from 2007 IEEE International Symposium on Nanoscale Architecture (NANOARCH 2007). This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of MITRE's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.
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