Delay-based Physical Unclonable Functions for Chiplet Interconnects

Patented

Patent Number: 12,664,250

Date of Patent: June 23, 2026

Embodiments described herein include a system, apparatus, article of manufacture, method and/or computer program product embodiments, and/or combinations and sub-combinations thereof, for delay-based physical unclonable functions (PUFs) for chiplets to verify system integrity. A die may include a plurality of chiplets including a first chiplet and a second chiplet. The first chiplet may be connected to the second chiplet via an interposer. As part of an authentication process, the first chiplet may request the second chiplet to transmit a signal via one or more wires of the interposer. A first signature based on the characteristics of the transmitted signal may be measured at a first time, which constitutes the first evaluation of the PUF. The first signature may be used as a baseline comparison for subsequent signatures as a means to confirm that the chiplets, interposers, and/or interconnects have not been altered or modified.

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