Systems and methods for real-time binary analysis with hot patching of programmable logic controllers
Patent Number: 12,340,211
Date of Patent: June 24, 2025
Real-Time Binary Analysis with Hot Patching of Logic Controllers
Described herein are systems and methods for performing real-time binary analysis of code running in programmable logic controllers, specifically to systems and methods for generating patches, testing patches, and implementing patches on programmable logic controllers while the controller is operating. In one or more examples, a profile of the physical operation controlled by the PLC and the broader system can be generated. In one or more examples, once a profile has been generated, the system and methods described herein can capture data images that provide information regarding the operation of the system as well as the PLC. Based on the received data images, and the generated profile, the system can detect anomalies and/or safety constraint violations in the operation of the system that can be rectified or mitigated through patching (i.e., modification of the datasets or binary code used by the PLC).